Low threshold voltage (Vt) is achieved by applying a thin dielectric cap between the gate dielectric and metal gate. In addition, the use of laser-only annealing for gate stack engineering resulted in a significant reduction of the minimum sustainable gate length and improved short-channel effect control. The same processes were applied on FinFETs and resulted in a possible candidate technology for the 22nm node.
A major challenge in using high-k dielectrics for CMOS devices is the high threshold voltage resulting in low performance. Dual metal gates in combination with dual dielectrics can solve this problem but have the drawback that extra processing steps are required resulting in a higher processing cost. IMEC developed a simpler, lower-cost integration scheme using only one dielectric stack and one metal. A thin dielectric cap is deposited between the gate dielectric and metal gate which effectively modulates the work function towards the optimal operating zone. Laser anneal instead of spike anneal is applied to reduce the effective oxide thickness. Using laser-only annealing higher activated and shallow junctions could be achieved.
Both a lanthanium- (La2O3) and dysprosium-based (Dy2O3) capping layer was used for nMOS and an aluminum-based capping layer for pMOS. Symmetric low Vt of +/-0.25V were achieved and drive currents of 1035µA/µm and 505µA/µm for nMOS and pMOS respectively at VDD of 1.1V and Ioff of 100nA/µm. Successful CMOS integration was illustrated by a ring oscillator delay of less than 15ps.
Since thin gate dielectrics suffer from soft breakdown before the specified lifetime and the failure is difficult to forecast, IMEC developed a time-dependent dielectric breakdown model to completely predict the reliability of the devices. The model is based on the statistical analysis of hard breakdown including multiple soft breakdown and wear out. By applying the model on the high-k/metal gate devices, the excellent quality of the gate dielectrics has been demonstrated.
In strong collaboration with NXP and TSMC, excellent performance (drive current of 950µA/µm and Ioff of 50nA/µm at VDD of 1V for nMOS FinFETs) and short channel effect control were achieved for tall, narrow FinFETs without mobility enhancement. Physical vapor deposition (PVD) and atomic layer deposition (ALD) were compared as metal deposition technique. Since PVD metals are denser and less porous, PVD of titanium nitride (TiN) electrodes on hafnium oxide (HfO2) dielectrics gave improved nMOS performance compared to ALD TiN. IMEC also applied the dysprosium-based (Dy2O3) capping process on FinFETs resulting in a possible candidate technology for the 22nm node.
These results were obtained in collaboration with IMEC’s (sub-)32nm CMOS core partners including Infineon, Qimonda, Intel, Micron, NXP, Panasonic, Samsung, STMicroelectronics, Texas Instruments and TSMC, and IMEC’s key CMOS partners including Elpida and Hynix.
Katrien Marent | alfa
From rocks in Colorado, evidence of a 'chaotic solar system'
23.02.2017 | University of Wisconsin-Madison
Prediction: More gas-giants will be found orbiting Sun-like stars
22.02.2017 | Carnegie Institution for Science
In the field of nanoscience, an international team of physicists with participants from Konstanz has achieved a breakthrough in understanding heat transport
Cells need to repair damaged DNA in our genes to prevent the development of cancer and other diseases. Our cells therefore activate and send “repair-proteins”...
The Fraunhofer IWS Dresden and Technische Universität Dresden inaugurated their jointly operated Center for Additive Manufacturing Dresden (AMCD) with a festive ceremony on February 7, 2017. Scientists from various disciplines perform research on materials, additive manufacturing processes and innovative technologies, which build up components in a layer by layer process. This technology opens up new horizons for component design and combinations of functions. For example during fabrication, electrical conductors and sensors are already able to be additively manufactured into components. They provide information about stress conditions of a product during operation.
The 3D-printing technology, or additive manufacturing as it is often called, has long made the step out of scientific research laboratories into industrial...
Nature does amazing things with limited design materials. Grass, for example, can support its own weight, resist strong wind loads, and recover after being...
Nanometer-scale magnetic perforated grids could create new possibilities for computing. Together with international colleagues, scientists from the Helmholtz Zentrum Dresden-Rossendorf (HZDR) have shown how a cobalt grid can be reliably programmed at room temperature. In addition they discovered that for every hole ("antidot") three magnetic states can be configured. The results have been published in the journal "Scientific Reports".
Physicist Dr. Rantej Bali from the HZDR, together with scientists from Singapore and Australia, designed a special grid structure in a thin layer of cobalt in...
13.02.2017 | Event News
10.02.2017 | Event News
09.02.2017 | Event News
24.02.2017 | Life Sciences
24.02.2017 | Life Sciences
24.02.2017 | Trade Fair News