The new system uses a layer of non-conducting material embedded with discrete (non-overlapping) silicon nanodots, each approximately 3 nanometers across. Each nanodot functions as a single memory bit.
To control the memory operation, this layer is then covered with a thin metallic layer, which functions as a "metal gate." The metal gate controls the "on" and "off" states of the transistor. The results are published in the American Institute of Physics' (AIP) journal Applied Physics Letters.
"The metal-gate structure is a mainstream technology on the path toward nanoscale complementary metal-oxide-semiconductor (CMOS) memory technology," said co-author Jia-Min Shieh, researcher, National Nano Device Laboratories, Hsinchu, Taiwan. "Our system uses numerous, discrete silicon nanodots for charge storage and removal. These charges can enter (data write) and leave (data erase) the numerous discrete nanodots in a quick and simple way."
The researchers were able to achieve this new milestone in speed by using ultra-short bursts of green laser light to selectively anneal (activate) specific regions around the metal layer of the metal gate of the memory. Since the sub-millisecond bursts of laser light are so brief and so precise, they are able to accurately create gates over each of the nanodots. This method of memory storage is particularly robust, the researchers explain, because if an individual charge in one of the nano-sites failed, it would barely influence the others. This enables a stable and long-lived data storage platform.
"The materials and the processes used for the devices are also compatible with current main-stream integrated circuit technologies," explains Shieh. "This technology not only meets the current CMOS process line, but can also be applied to other advanced-structure devices."
Article: "Fast Programming Metal-Gate Si Quantum Dot Nonvolatile Memory Using Green Nanosecond Laser Spike Annealing" is published in Applied Physics Letters.
Authors: Yu-Chung Lien (1), Jia-Min Shieh (1,2), Wen-Hsien Huang (1), Cheng-Hui Tu (2), Chieh Wang (2), Chang-Hong Shen (1), Bau-Tong Dai (1), Ci-Ling Pan (3), Chenming Hu (4), and Fu-Liang Yang (1).(1) National Nano Device Laboratories, Hsinchu, Taiwan
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