A new hybrid technique could lead to mass-produced chips with molecular-scale structure Scientists at the University of Wisconsin´s Materials Research Science and Engineering Center (MRSEC) on Nanostructures, Materials, and Interfaces have demonstrated a technique that could one day allow electronic devices to assemble themselves automatically--giving semiconductor manufacturers a way to mass-produce "nanochips" that have circuit elements only a few molecules across, roughly ten times smaller than the features in current-generation chips.
"In terms of storage alone, that could mean a computer with 4,000 gigabytes of memory," says center director Juan de Pablo, a member of the Wisconsin team, which is publishing its results in the July 24 issue of the journal Nature. The Wisconsin MRSEC is one of 27 materials research centers established by the National Science Foundation. Indeed, adds team leader Paul Nealey, "we work closely with the Semiconductor Research Corporation," an industry consortium that includes such firms as IBM, Motorola, Intel, AMD, and Shipley.
Basically, the two researchers explain, the chip-makers are worried about what happens next. In today´s fabrication plants, solid-state circuit elements are etched onto the surface of a wafer of silicon via lithography: a process that´s somewhat like exposing photographic film and then developing it. That approach has gotten the manufacturers down to features on a scale of 100-150 nanometers, which is typical of current-generation chips like the Pentium 4. "But the cost of the factories is increasing at an exponential rate," says de Pablo, "and it´s not clear if they can extrapolate their current technology much below 50 nanometers."
Mitch Waldrop | EurekAlert
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