A COMPLEX Challenge – Increasing Efficiency in Co-Development of Hardware and Software Engineers

The new EU-funded research project COMPLEX has started and announced details of the multinational/ multidisciplinary program: “COMPLEX – COdesing and power Management in PLatform-based design space EXploration”. The heterogeneity and complexity of embedded systems rises continuously.

This creates certain gaps and defines three main challenges a leading industry has to face. First, handle the rising complexity of execution platforms and applications, combined with the uncertainty of platform selection and application to platform mapping. Second, find the balance between increasing power consumption, possible performance, and explicit application needs. Finally, meet memory demands both in size and access times.

The mission of this 3-year project is to keep up with rapid technology advances and to decrease the impact of these gaps. Partners in COMPLEX will develop an innovative and highly efficient productive design methodology and a holistic framework for iteratively exploring the design space of embedded HW/SW systems. This requires precise estimation of performance and power consumption at the same time, demanding a framework capable to describe a complete embedded system. According to this, COMPLEX will integrate, bundle, and augment available point-tools as well as predesigned system components from different European vendors. Altogether the project will lead to the following main objectives:

– Highly efficient productive design methodology and holistic framework for design space exploration of embedded HW/SW systems. The framework will be platform and application domain independent. It will provide open interfaces for the later integration of new industry players.

– Combining and augmenting established Electronic System Level (ESL) synthesis & analysis tools into a seamless design flow, enabling performance & power aware virtual prototyping of HW/SW systems.

– Interfacing next-generation model-driven SW design approaches and industry standard model-based design environments.

– Multi-objective co-exploration for assessing design quality and optimizing the system platform with respect to performance, and power metrics.

– Fast simulation and assessment of the platform with up to bus-cycle accuracy at ESL.

– Optimization by run-time mode adaptation techniques, such as dynamic power management or application adaptation to varying workloads and iterative exploration and refinement of advanced applications.

Achieving these goals will lower existing barriers between HW and SW developers. SW designers will be able to explore various HW implementations and HW designers can hide irrelevant technical details. Nevertheless, a clear view on the results of the application code in terms of timing behaviour and power consumption will be preserved. Finally, this framework will offer cooperating developers of next-generation networked embedded systems a highly efficient design methodology and tool chain.

The COMPLEX consortium consists of leading European partners from research, industry, and the Electronic Design Automation (EDA) sector. Thus, the project’s outcome will be well connected to the next-generation system specification and design methodology. Summarized, this is the automatic generation of an efficient executable virtual system, giving accurate and reliable timing and power information, and the integration of an automatic design space exploration to find the optimal design space instance parameters. These results are expected to reinforce Europe's industrial strengths by overcoming technology roadblocks and to develop systems, respecting alternative paths to next generation technologies and sustainable development. As a consequence of this COMPLEX will lay the foundations for innovation in various major products and services. Electronic components can be built increasingly smaller, cheaper, more reliable, and less power consuming. Furthermore, the framework will allow system integrators to identify the ideal technology platform models for their customers.

Contact for editorial enquiries:
Kim Grüttner
Group Manager Hardware/Software Design Methodology
Phone: +49 441 9722-228
Email: kim.gruettner@offis.de
Enclosure – Further information to this press release:
Further information to the project:
The total cost of the project is 7.2 M€, of which 4.8 M€ will be contributed by the European Union under the Information and Communication Technology (ICT) theme of the Seventh Framework Programme (FP7). The partners involved in COMPLEX, coordinated by OFFIS, are:
– OFFIS Institute for Information Technology, Germany (Coordinator)
– STMicroelectronics srl., Italy
– STMicroelectronics Beijing R&D Inc., People’s Republic of China
– Thales Communications SA, France
– GMV Aerospace and Defence SA, Spain
– CoWare NV, Belgium
– ChipVision Design Systems AG, Germany
– EDALab srl, Italy
– Magillem Design Services SA, France
– Politecnico di Milano, Italy
– Universidad de Cantabria, Spain
– Politecnico di Torino, Italy
– IMEC, Belgium
– European Electronic Chips & Systems design Initiative, France
About OFFIS:
OFFIS – Institute for Information Technology
The OFFIS – Institute for Information Technology is a 1991 founded internationally active application-oriented research and development institute for selected fields of computer science and their areas of application. The technological knowledge transfer from research to economy is OFFIS' core business. Therefore OFFIS converts scientific know-how into prototypes – and these are refined into marketable products by our partners from industry. Approx. 250 employees combine their technological and industrial know-how in an average of 60 ongoing research projects in our main thematic competencies Energy, Health and Transportation.