The workshop will focus on silicon-related nanoelectronics to bridge a gap between the Si nano-technology and the "real" VLSI world. The first Silicon Nanoelectronics Workshop was successfully held in June, 1996 at Honolulu, Hawaii, USA. The 2011 Silicon Nanoelectronics Workshop will be the 16th in a series of annual workshops.
The workshop will cover various aspects of VLSI-related silicon nanoelectronics. Areas of interest include, but are not limited to:
Si based sub-10 nm FETs with conventional and novel architecture including vertical and multiple-gate devices and novel channel materials
Device physics of Si based nanodevices including quantum effects, nonequilibrium and ballistic transport
Si based nanoscale device modelling and simulations
Extreme processing of Si based nanostructures, including nanopatterning
Junction and insulator technology for Si based nanodevices
Nanoscale surface, interface, and heterojunction effects in Si based devices
Si based device scaling issues including doping fluctuations and atomic granularity
Circuit design issues and novel circuit architectures for Si based nanodevices including silicon based quantum computing
Optoelectronics using silicon nanostructures
Nanoelectronics challenging to replace Si technologies (Graphene, CNTs, etc.)
For more details, including registration and submission information, follow the links below or contact snw2011(at)ssn.pe.titech.ac.jp.
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