This achievement open the way to adopting different device structures in the same chip to optimise performance, density and power consumption.
The devices were processed within CEA-LETI facilities where the e-beam lithography platform allowed the fabrication of 15nm gate length devices. The work was carried out in the frame of the French Carnot Institutes initiative and in collaboration with the IMEP Grenoble and STMicroelectronics Crolles.
The full results showing the structures and the electrical results will be presented at IEDM conference next December where CEA-LETI will participate with over 10 papers on different aspects of nanotechnologies, advanced devices and process integration.
About CEA-LETI:
Located in Grenoble, Leti (Electronics and Information Technology Laboratory of the French Atomic Energy Commission) is one of the main European applied research centers in electronics. More than 85% of its activity is devoted to research with 350 contracts a year. Since its creation in 1967, Leti has led to the creation of more than 30 start-ups in high-technology. The main areas of activity are micro- and nano-technologies for microelectronics (more Moore, More than Moore and Beyond CMOS), technologies, design and integration of microsystems, photonics and imaging technologies, micro- and nano-technologies for biology and health, communication technologies and nomadic objects.
Leti operates with an annual budget of 174 M€ and employs 1,000 people with, in addition, more than 600 external collaborators (postgraduates, research and corporate partners). Leti has 8,000m² of clean rooms, an equipment portfolio worth 200 M€ and invests more than 40 M€ a year on new equipment. Leti has a dynamic Intellectual Property policy and has filed more than 200 new patent applications in 2007. Instigator of the MINATEC® pole of innovation, CEA Leti is also one of its principal partners, beside the Grenoble INP (Grenoble Institute of Technology) and the local authorities.
Clément Moulet | Source: alphagalileo
Further information: www.cea.fr
Further Reports about: 15nm gate length devices > 3D nanowire FET > CEA-LETI > standard planar FDSOI devices > transistor dimension > transistor structures
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