Straight edges, good. Wavy edges, bad. This simple description holds true whether you are painting the living room or manufacturing nanoscale circuit features.
A colorized scanning electron microscope image shows the "waviness" or roughness of edges on reference lines made of silicon that are about 100 nanometers wide. Credit: B. Bunday, SEMATECH/K. Talbott, NIST
A new NIST/SEMATECH technique should help semiconductor facilities improve measurement of the "linewidth roughness." Courtesy HDR Architecture, Inc./Steve Hall© Hedrich Blessing
In a technical paper* published in June, researchers at the National Institute of Standards and Technology (NIST) and SEMATECH describe an improved method for determining nanoscale "linewidth roughness," an important quality control factor in semiconductor fabrication. Their research shows that current industry measurement methods may be exaggerating roughness of the smoothest circuit features by 40 percent or more above true values.
As circuit features shrink in size to below 50 nanometers, wavy or rough edges within semiconductor transistors may cause circuit current losses or may prevent the devices from reliably turning on and off with the same amount of voltage.
Gail Porter | EurekAlert!
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