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Processor design gets mathematical sweetener

30.01.2008
A breakthrough microchip specification language will allow ambiguous English to be replaced by a mathematically precise description of processor functions and design. Better yet, it applies to every stage of microprocssor design. The upshot could be millions of euros saved by microchip producers.

Microchip design is a tricky business. First, there is a question of functionality. Engineers describe, in minute detail, what a particular microchip must do, in plain English. It is an essential task detailing the chip specifications for each stage of the microchip creation process: design, fabrication and verification.

Unfortunately, English is not a mathematically precise language. So, problems of interpretation are rife. Worse, at each development stage engineers are obliged to render the English specification or ‘spec’ list into a mathematically precise function set.

But worst of all, each stage uses different languages, and those languages vary between microchip companies. It is hugely inefficient and prone to error.

That is all set to change. “Before property specification language (PSL), there was no industry standard for describing microchip properties,” says Cindy Eisner, coordinator of PROSYD and Senior Architect for Verification Technologies at the IBM Haifa Research Laboratory. “Now the IEEE has adopted PSL as a standard specification language. So, we now have an industry standard for microprocessor design.”

PROSYD’s mission was, first, to create tools to deploy PSL for chip design, fabrication and verification. The project then used these tools to demonstrate PSL’s benefits. Finally, it sought to foster a revolution in chip design by promoting PSL as a new industry standard.

Mission accomplished, with aplomb. The EU project sought to reduce design errors by 50% but also increase design efficiency. At the end of the two-year €7 million project, PROSYD demonstrated a staggering reduction in design errors of up to 100%, at the same time increasing design efficiency by 16 to 22%.

After designers become more familiar with the new toolset and language, an even more impressive gain in efficiency can be expected, suggests Eisner.

It seems obvious now. If one stage of microchip development needs a precise description language, then should we not describe every stage the same way?

Or perhaps not so obvious…
Not quite. PSL grew out of IBM’s verification language SUGAR created in 1994 to standardise just the verification stage. Before SUGAR, there was no standard way to verify a chip. Developers made up their own languages and passed them down, like grandma’s prized soup recipes.

But once SUGAR arrived, microprocessor design hit upon a Eureka moment: why not describe every stage of chip creation the same way! Then the IEEE, the professional association for electronic engineers, took up the task and PSL/SUGAR became the standard.

PROSYD’s key contribution is the large suite of tools that link PSL across the microchip production process. There are over 16 tools in the set, which make PSL easy to deploy.

This is not the only achievement by PROSYD, though. The project’s case studies offer firm proof of the benefits of PSL and the PROSYD tools.

The project also led to unexpected benefits. PROSYD developed a very cool tool that will take a list of desired properties and actually design a microprocessor sub-circuit with those functions – something like machines creating themselves.

“It’s a very early version of the tool,” remarks Eisner, “you couldn’t use it to design a whole chip, but it could be useful to design a simple sub-circuit. It would be very useful for circuits that are fairly simple, but time-consuming to do.”

PROSYD’s long-term goal, not envisioned for the lifetime of the original project, was nothing less than a revolution in the microchip industry. That seems to be happening already. Actors outside the project are taking PROSYD and running with it, setting up conferences and producing materials to disseminate PSL and PROSYD tools. So now, finally, microchip design gets a unified, mathematically precise description language.

Christian Nielsen | alfa
Further information:
http://cordis.europa.eu/ictresults/index.cfm/section/news/tpl/article/BrowsingType/Features/ID/89179

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