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New technique aids nano-electronic manufacturing


In the time it takes to read this sentence, your fingernail will have grown one nanometer. That’s one-billionth of a meter and it represents the scale at which electronics must be built if the march toward miniaturization is to continue.

Reporting in the June 3 issue of the Journal Science, an international team of researchers shows how control over materials on this tiny scale can be extended to create complex patterns important in the production of nano-electronics.

About two years ago, a team led by University of Wisconsin-Madison Chemical and Biological Engineering Professor Paul Nealey, demonstrated a lithographic technique for creating patterns in the chemistry of polymeric materials used as templates for nano-manufacturing. They deposited a film of block copolymers on a chemically patterned surface such that the molecules arranged themselves to replicate the underlying pattern without imperfections.

That technique works well for creating templates that are neatly ordered in periodic arrays, explains Nealey, who directs the NSF-funded Nanoscale Science and Engineering Center. "But one of the challenges of nanofabrication is integrating these self-assembling materials, that naturally form periodic structures, into existing manufacturing strategies," he says.

Adds Nealey: "Engineers create microelectronics under free-form design principles. Not everything fits neatly into an array. This new technique directs the assembly of blends of block copolymers and homopolymers on chemically nano-patterned substrates. The result is the creation of structures with non-regular geometries. We’ve now potentially harnessed the fine control over structure dimensions, afforded by self-assembling materials, to allow for the production of complex nano-electronic devices."

That kind of control is critical if computer architects are to continue advancing by Moore’s Law. In 1965, Gordon Moore noted the exponential growth in the number of transistors per integrated circuit and predicted the trend would continue. It has. About every 18 months, the number of transistors in computer chips doubles. By decreasing the size of these components and, consequently, fitting more of them onto a single chip, computer speed and power improves. But before long, existing technology will run out of room.

Current manufacturing processes employing chemically amplified lithography techniques achieve dimensions as small as 50 to 70 nanometers, but that technology might not be extendable as feature dimensions shrink below 30 nanometers.

By merging the latest principles of lithography and self-assembly block-copolymer techniques, researchers at UW-Madison and the Paul Scherrer Institute in Switzerland developed a hybrid approach that maximizes the benefits and minimizes the limitations of each approach to nano-manufacturing.

"These new self-assembly materials used in conjunction with the most advanced exposure tools may enable the extension of current manufacturing practices to dimensions of 10 nanometers and less," says Chemical and Biological Engineering graduate student and co-author Mark Stoykovich.

Paul Nealey | EurekAlert!
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