Researchers at Purdue University have created a "unified model" for predicting the reliability of new designs for silicon transistors – a potential tool that industry could use to save tens of millions of dollars annually in testing costs.
The model is the first method that can be used to simultaneously evaluate the reliability of two types of transistors essential for so-called CMOS computer chips, the most common type of integrated circuits in use today. The two types of transistors degrade differently over time, and the model is able to relate these two different classes of degradation simultaneously. "It is the first single tool for accurately predicting how new designs for both types of transistors will degrade over time," said Ashraf Alam, a professor of electrical and computer engineering at Purdue.
The degradation revolves around bonds between atoms of hydrogen and silicon and hydrogen and silicon dioxide. Specifically, the mathematical model enables researchers to see the rates at which these hydrogen bonds in the two types of transistors will break over time. The breaking bonds are directly related to a transistors long-term reliability. Because hydrogen bonds break differently in the two types of transistors, separate models have been required in conventional testing for new designs. "This testing requires a huge amount of resources, costing companies millions of dollars annually," Alam said. "If you could explain both within the same framework, then you could cut down significantly on the number of measurements required to characterize the performance of the transistors."
Emil Venere | EurekAlert!
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